Seyed Arash Katourani
This paper presents the design, implementation, and performance evaluation of LUCAS, a low-power, ultra-low jitter ASIC optimized for SiPM readout in Time-of-Flight Computed Tomography (ToF-CT) applications. Leveraging a novel preamplifier design with low input impedance and current-mode operation, LUCAS addresses challenges such as parasitic capacitance of SiPMs and high-speed detection requirements. The ASIC, fabricated in TSMC 65nm CMOS technology, features eight channels with an integrated preamplifier and comparator, achieving an SPTR of 201 ps FWHM at 3.2 mW/ch. Experimental validation includes input impedance measurements, SPTR testing with a pulsed laser source, and energy-to-Time-over-Threshold calibration using monoenergetic X-ray sources. The results demonstrate the effectiveness of LUCAS in enhancing timing resolution while minimizing power consumption, offering significant advancements for high-resolution ToF-CT imaging.
@article{0fa8cb55-1ff2-47c0-89f2-99420783f561,
title={2025 Katourani LUCAS CMOS SiPM Readout ASIC},
author={Seyed Arash Katourani},
year={2026},
language={en}
}TY - JOUR TI - 2025 Katourani LUCAS CMOS SiPM Readout ASIC AU - Seyed Arash Katourani PY - 2026 LA - en ER -
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